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» Design Challenges for New Application-Specific Processors
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ECAI
2010
Springer
14 years 10 months ago
Parallel TBox Classification in Description Logics - First Experimental Results
Abstract. One of the most frequently used inference services of description logic reasoners classifies all named classes of OWL ontologies into a subsumption hierarchy. Due to emer...
Mina Aslani, Volker Haarslev
FPGA
2007
ACM
150views FPGA» more  FPGA 2007»
15 years 3 months ago
FPGA-friendly code compression for horizontal microcoded custom IPs
Shrinking time-to-market and high demand for productivity has driven traditional hardware designers to use design methodologies that start from high-level languages. However, meet...
Bita Gorjiara, Daniel Gajski
89
Voted
SPAA
2006
ACM
15 years 3 months ago
Modeling instruction placement on a spatial architecture
In response to current technology scaling trends, architects are developing a new style of processor, known as spatial computers. A spatial computer is composed of hundreds or eve...
Martha Mercaldi, Steven Swanson, Andrew Petersen, ...
MICRO
2006
IEEE
145views Hardware» more  MICRO 2006»
15 years 3 months ago
Virtually Pipelined Network Memory
We introduce virtually-pipelined memory, an architectural technique that efficiently supports high-bandwidth, uniform latency memory accesses, and high-confidence throughput eve...
Banit Agrawal, Timothy Sherwood
RSP
2005
IEEE
164views Control Systems» more  RSP 2005»
15 years 3 months ago
High Level Synthesis for Data-Driven Applications
Abstract— John von Neumann proposed his famous architecture in a context where hardware was very expensive and bulky. His goal was to maximize functionality with minimal hardware...
Etienne Bergeron, Xavier Saint-Mleux, Marc Feeley,...