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ICCAD
2006
IEEE
101views Hardware» more  ICCAD 2006»
16 years 19 days ago
Guaranteeing performance yield in high-level synthesis
Meeting timing constraint is one of the most important issues for modern design automation tools. This situation is exacerbated with the existence of process variation. Current hi...
Wei-Lun Hung, Xiaoxia Wu, Yuan Xie
117
Voted
SMC
2007
IEEE
130views Control Systems» more  SMC 2007»
15 years 10 months ago
Simulation framework for training chest tube insertion using virtual reality and force feedback
—Most virtual reality simulators are designed for complex medical procedures, such as laparoscopic surgery. While important, these simulators are of use for only a subset of spec...
Nader S. Raja, John A. Schleser, William P. Norman...
DATE
2006
IEEE
126views Hardware» more  DATE 2006»
15 years 9 months ago
Analysis and modeling of power grid transmission lines
Power distribution and signal transmission are becoming key limiters for chip performance in nanometer era. These issues can be simultaneously addressed by designing transmission ...
J. Balachandran, Steven Brebels, G. Carchon, T. We...
DSD
2006
IEEE
159views Hardware» more  DSD 2006»
15 years 9 months ago
Deadlock Free Routing Algorithms for Mesh Topology NoC Systems with Regions
Region concept helps to accommodate cores larger than the tile size in mesh topology NoC architectures. In addition, it offers many new opportunities for NoC design, as well as pr...
Rickard Holsmark, Maurizio Palesi, Shashi Kumar
JCDL
2006
ACM
99views Education» more  JCDL 2006»
15 years 9 months ago
Using resources across educational digital libraries
This article reports on analyses of usage and design activities by users of the Instructional Architect (IA), an end-user authoring tool designed to support easy access to and use...
Mimi Recker, Bart Palmer