5107 search results - page 362 / 1022 » Design Issue Of ECTST |
161
click to vote
HIPEAC
2010
Springer
16 years 1 months ago
2010
Springer
Abstract. Multi-core processors with shared last-level caches are vulnerable to performance inefficiencies and fairness issues when the cache is not carefully managed between the m...
162
click to vote
ALT
2001
Springer
16 years 1 months ago
2001
Springer
The growing use of information visualization tools and data mining algorithms stems from two separate lines of research. Information visualization researchers believe in the impor...
148
click to vote
ICCD
2006
IEEE
16 years 1 months ago
2006
IEEE
—Reducing energy consumption is an important issue for battery powered embedded computing systems. Content Addressable Memory (CAM)-based Highly-Associative Caches (HAC) are wide...
154
click to vote
ICCD
2005
IEEE
16 years 1 months ago
2005
IEEE
The dynamic instruction scheduling logic is one of the most critical components of modern superscalar microprocessors, both from the delay and power dissipation standpoints. The d...
142
click to vote
ICCAD
2006
IEEE
16 years 1 months ago
2006
IEEE
Energy-efficiency and power-awareness for electronic systems have been important design issues in hardware and software implementations. We consider the scheduling of periodic ha...