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ISCA
1998
IEEE
151views Hardware» more  ISCA 1998»
15 years 2 months ago
Integrated Predicated and Speculative Execution in the IMPACT EPIC Architecture
Explicitly Parallel Instruction Computing (EPIC) architectures require the compiler to express program instruction level parallelism directly to the hardware. EPIC techniques whic...
David I. August, Daniel A. Connors, Scott A. Mahlk...
ISCA
1998
IEEE
139views Hardware» more  ISCA 1998»
15 years 2 months ago
Simultaneous Multithreading: Maximizing On-Chip Parallelism
This paper examines simultaneous multithreading, a technique permitting several independent threads to issue instructions to a superscalar's multiple functional units in a si...
Dean M. Tullsen, Susan J. Eggers, Henry M. Levy
77
Voted
ISSS
1998
IEEE
120views Hardware» more  ISSS 1998»
15 years 2 months ago
Application of Instruction Analysis/Synthesis Tools to x86's Functional Unit Allocation
Designing a cost effective superscalar architecture for x86 compatible microprocessors is a challenging task in terms of both technical difficulty and commercial value. One of the...
Ing-Jer Huang, Ping-Huei Xie
VLDB
1999
ACM
131views Database» more  VLDB 1999»
15 years 2 months ago
High-Performance Extensible Indexing
Today’s object-relational DBMSs (ORDBMSs) are designed to support novel application domains by providing an extensible architecture, supplemented by domain-specific database ex...
Marcel Kornacker
ASPLOS
1998
ACM
15 years 2 months ago
Performance of Database Workloads on Shared-Memory Systems with Out-of-Order Processors
Database applications such as online transaction processing (OLTP) and decision support systems (DSS) constitute the largest and fastest-growing segment of the market for multipro...
Parthasarathy Ranganathan, Kourosh Gharachorloo, S...