473 search results - page 13 / 95 » Design Methodologies for Noise in Digital Integrated Circuit... |
IPPS
2002
IEEE
15 years 4 months ago
2002
IEEE
Hydra is a computer hardware description language that integrates several kinds of software tool (simulation, netlist generation and timing analysis) within a single circuit speci...
ASPDAC
2008
ACM
15 years 1 months ago
2008
ACM
Traditionally, clock network layout is performed after cell placement. Such methodology is facing a serious problem in nanometer IC designs where people tend to use huge clock buff...
96
Voted
DAC
2003
ACM
16 years 21 days ago
2003
ACM
In this work, we report on an unprecedented design where digital, analog, and MEMS technologies are combined to realize a generalpurpose single-chip CMOS microsystem. The converge...
70
Voted
DAC
2003
ACM
16 years 21 days ago
2003
ACM
118
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GLVLSI
2006
IEEE
15 years 5 months ago
2006
IEEE
As CMOS devices and operating voltages are scaled down, noise and defective devices will impact the reliability of digital circuits. Probabilistic computing compatible with CMOS o...