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DATE
2005
IEEE
154views Hardware» more  DATE 2005»
15 years 5 months ago
Top-Down Design of a Low-Power Multi-Channel 2.5-Gbit/s/Channel Gated Oscillator Clock-Recovery Circuit
We present a complete top-down design of a low-power multi-channel clock recovery circuit based on gated current-controlled oscillators. The flow includes several tools and method...
Paul Muller, Armin Tajalli, Seyed Mojtaba Atarodi,...
SBCCI
2006
ACM
126views VLSI» more  SBCCI 2006»
15 years 5 months ago
Power constrained design optimization of analog circuits based on physical gm/ID characteristics
This paper presents a transistor optimization methodology for low-power analog integrated CMOS circuits, relying on the physics-based gm/ID characteristics as a design optimizatio...
Alessandro Girardi, Sergio Bampi
DATE
2009
IEEE
202views Hardware» more  DATE 2009»
15 years 6 months ago
Design as you see FIT: System-level soft error analysis of sequential circuits
Soft errors in combinational and sequential elements of digital circuits are an increasing concern as a result of technology scaling. Several techniques for gate and latch hardeni...
Daniel Holcomb, Wenchao Li, Sanjit A. Seshia
DATE
2008
IEEE
79views Hardware» more  DATE 2008»
15 years 6 months ago
A Programmable and Low-EMI Integrated Half-Bridge Driver in BCD Technology
This paper presents the design and the laboratory results of an integrated half-bridge driver for power electronic systems in a 0.35 µm Bipolar CMOS DMOS (BCD) technology. The pr...
Francesco D'Ascoli, Luca Bacciarelli, Massimiliano...
ICCAD
2007
IEEE
139views Hardware» more  ICCAD 2007»
15 years 8 months ago
Remote activation of ICs for piracy prevention and digital right management
— We introduce a remote activation scheme that aims to protect integrated circuits (IC) intellectual property (IP) against piracy. Remote activation enables designers to lock eac...
Yousra Alkabani, Farinaz Koushanfar, Miodrag Potko...