473 search results - page 28 / 95 » Design Methodologies for Noise in Digital Integrated Circuit... |
ASPDAC
2005
ACM
15 years 5 months ago
2005
ACM
: In ultra-deep submicron VLSI circuits, clock network is a major source of power consumption and power supply noise. Therefore, it is very important to minimize clock network size...
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CASES
2006
ACM
15 years 5 months ago
2006
ACM
Rising interest in the applications of wireless sensor networks has spurred research in the development of computing systems for lowthroughput, energy-constrained applications. Un...
DAC
1994
ACM
15 years 4 months ago
1994
ACM
Today's high-performance single-chip CMOS microprocessors are the most complex and challenging chip designs ever implemented. To stay on the leading edge, Digital's micro...
ISCAS
2007
IEEE
15 years 6 months ago
2007
IEEE
— Low-power consumption has become a highly important concern for synchronous standard-cell design, and consequently mandates the use of low-power design methodologies and techni...
DAC
1994
ACM
15 years 4 months ago
1994
ACM
Higher levels of integration have led to a generation of integrated circuits for which power dissipation and reliability are major design concerns. In CMOS circuits, both of these ...