473 search results - page 38 / 95 » Design Methodologies for Noise in Digital Integrated Circuit... |
118
click to vote
ASPDAC
2004
ACM
15 years 5 months ago
2004
ACM
— The problem of minimizing dynamic power consumption by scaling down the supply voltage of computational elements off critical paths is widely addressed in the literature for th...
GLVLSI
2003
IEEE
15 years 5 months ago
2003
IEEE
A new split accumulator architecture to be used in direct digital frequency synthesizers (DDFS) systems is presented. This new design eliminates the need of adders on the section ...
GLVLSI
2009
IEEE
15 years 6 months ago
2009
IEEE
A synthetic noise function is a key component of most computer graphics rendering systems. This pseudo-random noise function is used to create a wide variety of natural looking te...
112
click to vote
CODES
2005
IEEE
15 years 5 months ago
2005
IEEE
Majority of existing works on system level power estimation have focused on the processor, while there are very few that address power consumption of peripherals in a SoC. With th...
135
click to vote
FPGA
2003
ACM
15 years 5 months ago
2003
ACM
This paper describes the hardware implementation of a real-time, large-scale, multi-chip FPGA (Field Programmable Gate Array) based emulation engine with a capacity of 10 million ...