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GLVLSI
2005
IEEE
122views VLSI» more  GLVLSI 2005»
15 years 5 months ago
Thermal aware cell-based full-chip electromigration reliability analysis
A hierarchical scheme with cells and modules is crucial for managing design complexity during a large integrated circuit design. We present a methodology for thermal aware cell-ba...
Syed M. Alam, Donald E. Troxel, Carl V. Thompson
DAC
2002
ACM
16 years 24 days ago
Combined BEM/FEM substrate resistance modeling
For present-day micro-electronic designs, it is becoming ever more important to accurately model substrate coupling effects. Basically, either a Finite Element Method (FEM) or a B...
Eelco Schrik, N. P. van der Meijs
DAC
2002
ACM
16 years 24 days ago
Dynamic and leakage power reduction in MTCMOS circuits using an automated efficient gate clustering technique
Reducing power dissipation is one of the most principle subjects in VLSI design today. Scaling causes subthreshold leakage currents to become a large component of total power diss...
Mohab Anis, Mohamed Mahmoud, Mohamed I. Elmasry, S...
CASES
2006
ACM
15 years 5 months ago
Modeling heterogeneous SoCs with SystemC: a digital/MEMS case study
Designers of SoCs with non-digital components, such as analog or MEMS devices, can currently use high-level system design languages, such as SystemC, to model only the digital par...
Ankush Varma, Muhammad Yaqub Afridi, Akin Akturk, ...
ISLPED
2009
ACM
108views Hardware» more  ISLPED 2009»
15 years 4 months ago
Technology flavor selection and adaptive techniques for timing-constrained 45nm subthreshold circuits
We investigate techniques to design 45nm minimum-energy subthreshold CMOS circuits under timing constraints, considering the practical case of an 8-bit multiplier. We first show ...
David Bol, Denis Flandre, Jean-Didier Legat