473 search results - page 5 / 95 » Design Methodologies for Noise in Digital Integrated Circuit... |
DATE
2009
IEEE
15 years 4 months ago
2009
IEEE
This paper presents a design methodology for fully reconfigurable low-voltage Delta-Sigma converters as for instance used in next-generation wireless applications. The design metho...
ISQED
2006
IEEE
15 years 3 months ago
2006
IEEE
Due to aggressive technology scaling, VLSI circuits are becoming increasingly susceptible to transient errors caused by single-event-upsets (SEUs). In this paper, we introduce two...
ISCAS
2008
IEEE
15 years 3 months ago
2008
IEEE
—Integrated circuit (IC) design for a wireless BCI system is put forward in this paper. The system is composed of an electrode, a stimulator, antennas, and an integrated circuit ...
76
Voted
DATE
2005
IEEE
14 years 11 months ago
2005
IEEE
This paper reports a novel simulation methodology for analysis and prediction of substrate noise impact on analog / RF circuits taking into account the role of the parasitic resis...
ISQED
2002
IEEE
15 years 2 months ago
2002
IEEE
In this paper, we describe a comprehensive layout methodology for bonded three-dimensional integrated circuits (3D ICs). In bonded 3D integration technology, parts of a circuit ar...