473 search results - page 6 / 95 » Design Methodologies for Noise in Digital Integrated Circuit... |
KES
1998
Springer
15 years 1 months ago
1998
Springer
The architectural and circuit design aspects of a mixed analog/digital very large scale integration (VLSI) motion detection chip based on models of the insect visual system are des...
ISCAS
2007
IEEE
15 years 3 months ago
2007
IEEE
— A substrate biasing methodology is introduced based on modifying standard cells by inserting dedicated substrate contacts in those cells behaving as aggressive digital noise ge...
ICCAD
2002
IEEE
15 years 6 months ago
2002
IEEE
For many years, CMOS process scaling has allowed a steady increase in the operating frequency and integration density of integrated circuits. Only recently, however, have we reach...
103
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ICCAD
1997
IEEE
15 years 1 months ago
1997
IEEE
The relentless push for high performance in custom digital circuits has led to renewed emphasis on circuit optimization or tuning. The parameters of the optimization are typically...
73
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ISVLSI
2003
IEEE
15 years 2 months ago
2003
IEEE
Three-dimensional integration technologies have been proposed in order to mitigate design challenges posed by deep-submicron interconnect. By providing multiple layers of active d...