473 search results - page 80 / 95 » Design Methodologies for Noise in Digital Integrated Circuit... |
70
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GLVLSI
2003
IEEE
15 years 5 months ago
2003
IEEE
In this paper, we describe a low power and high speed multiplier suitable for standard cell-based ASIC design methodologies. For the purpose, an optimized booth encoder, compact 2...
DAC
2008
ACM
16 years 22 days ago
2008
ACM
In modular testing of system-on-a-chip (SoC), test access mechanisms (TAMs) are used to transport test data between the input/output pins of the SoC and the cores under test. Prio...
ICSE
2005
IEEE-ACM
15 years 11 months ago
2005
IEEE-ACM
In this paper, I make a case for integration of requirements engineering (RE) with clinical disciplines. To back my case, I look at two examples that employ a clinical RE approach...
101
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CHI
2004
ACM
15 years 5 months ago
2004
ACM
Current Personal Digital Assistants (PDAs) such as Pocket PCs provide little support for sketching. This is due, no doubt, to the limited screen size and relatively poor resolutio...
GLVLSI
1998
IEEE
15 years 4 months ago
1998
IEEE
In this research, we devised a new simple technique for statically holding analog weights, which does not require periodic refreshing. It further contains a mechanism to locally u...