473 search results - page 87 / 95 » Design Methodologies for Noise in Digital Integrated Circuit... |
108
Voted
FPGA
2005
ACM
15 years 5 months ago
2005
ACM
Floating-point Sparse Matrix-Vector Multiplication (SpMXV) is a key computational kernel in scientific and engineering applications. The poor data locality of sparse matrices sig...
108
Voted
DAC
2003
ACM
15 years 5 months ago
2003
ACM
We propose in this paper an extension on the Scan Chain Concealment technique to further reduce test time and volume requirement. The proposed methodology stems from the architect...
DAC
1995
ACM
15 years 3 months ago
1995
ACM
High-level synthesis (HLS) has been successfully targeted towards the digital signal processing (DSP) domain. Both application-speci c integrated circuits (ASICs) and application-...
87
Voted
ISPD
2006
ACM
15 years 5 months ago
2006
ACM
Physical Design of modern systems on chip is extremely challenging. Such digital integrated circuits often contain tens of millions of logic gates, intellectual property blocks, e...
104
Voted
ISPD
2009
ACM
15 years 6 months ago
2009
ACM
As VLSI technology moves to the 65nm node and beyond, interconnect delay greatly limits the circuit performance. As a critical component in interconnect synthesis, layer assignmen...