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ISCAS
2005
IEEE
191views Hardware» more  ISCAS 2005»
15 years 5 months ago
Behavioural modeling and simulation of a switched-current phase locked loop
Recent work has shown that the use of switched current methods can provide an effective route to implementation of analog IC functionality using a standard digital CMOS process. Fu...
Peter R. Wilson, Reuben Wilcock
GECCO
2009
Springer
130views Optimization» more  GECCO 2009»
15 years 6 months ago
Liposome logic
VLSI research, in its continuous push toward further miniaturisation, is seeking to break through the limitations of current circuit manufacture techniques by moving towards biomi...
James Smaldon, Natalio Krasnogor, Alexander Camero...
ICCAD
2003
IEEE
148views Hardware» more  ICCAD 2003»
15 years 8 months ago
Multi.Objective Hypergraph Partitioning Algorithms for Cut and Maximum Subdomain Degree Minimization
In this paper we present a family of multi-objective hypergraph partitioning algorithms based on the multilevel paradigm, which are capable of producing solutions in which both th...
Navaratnasothie Selvakkumaran, George Karypis
FPGA
2004
ACM
137views FPGA» more  FPGA 2004»
15 years 5 months ago
Multi-resource aware partitioning algorithms for FPGAs with heterogeneous resources
As FPGA densities increase, partitioning-based FPGA placement approaches are becoming increasingly important as they can be used to provide high-quality and computationally scalab...
Navaratnasothie Selvakkumaran, Abhishek Ranjan, Sa...
TVLSI
2002
144views more  TVLSI 2002»
14 years 11 months ago
On-chip inductance cons and pros
Abstract--This paper provides a high level survey of the increasing effects of on-chip inductance. These effects are classified into desirable and nondesirable effects. Among the u...
Yehea I. Ismail