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ISSS
2002
IEEE
125views Hardware» more  ISSS 2002»
15 years 4 months ago
Design Experience of a Chip Multiprocessor Merlot and Expectation to Functional Verification
We have fabricated a Chip Multiprocessor prototype code-named Merlot to proof our novel speculative multithreading architecture. On Merlot, multiple threads provide wider issue wi...
Satoshi Matsushita
ASAP
1997
IEEE
156views Hardware» more  ASAP 1997»
15 years 3 months ago
Design methodology for digital signal processing
Improvements in semiconductor integration density and the resulting problem of having to manage designs of increasing complexity is an old one, but still current. The new challeng...
Gerhard Fettweis
DAC
2005
ACM
16 years 20 days ago
Automatic scenario detection for improved WCET estimation
Modern embedded applications usually have real-time constraints and they are implemented using heterogeneous multiprocessor systems-on-chip. Dimensioning a system requires accurat...
Stefan Valentin Gheorghita, Sander Stuijk, Twan Ba...
MICRO
2010
IEEE
167views Hardware» more  MICRO 2010»
14 years 9 months ago
Erasing Core Boundaries for Robust and Configurable Performance
Single-thread performance, reliability and power efficiency are critical design challenges of future multicore systems. Although point solutions have been proposed to address thes...
Shantanu Gupta, Shuguang Feng, Amin Ansari, Scott ...
107
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TPDS
2010
260views more  TPDS 2010»
14 years 10 months ago
Real-Time Modeling of Wheel-Rail Contact Laws with System-On-Chip
—This paper presents the development and implementation of a multiprocessor system-on-chip solution for fast and real time simulations of complex and nonlinear wheel-rail contact...
Yongji Zhou, T. X. Mei, Steven Freear