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DATE
2005
IEEE
111views Hardware» more  DATE 2005»
15 years 1 months ago
Simultaneous Partitioning and Frequency Assignment for On-Chip Bus Architectures
In this paper, we provide a methodology to perform both bus partitioning and bus frequency assignment to each of the bus segment simultaneously while optimizing both power consump...
Suresh Srinivasan, Lin Li, Narayanan Vijaykrishnan
LCTRTS
2004
Springer
15 years 5 months ago
Spinach: a liberty-based simulator for programmable network interface architectures
This paper presents Spinach, a new simulator toolset specifically designed to target programmable network interface architectures. Spinach models both system components that are ...
Paul Willmann, Michael Brogioli, Vijay S. Pai
DATE
2006
IEEE
114views Hardware» more  DATE 2006»
15 years 5 months ago
COSMECA: application specific co-synthesis of memory and communication architectures for MPSoC
Memory and communication architectures have a significant impact on the cost, performance, and time-to-market of complex multi-processor system-on-chip (MPSoC) designs. The memory...
Sudeep Pasricha, Nikil D. Dutt
AOSE
2005
Springer
15 years 5 months ago
Zooming Multi-Agent Systems
Abstract Complex systems call for a hierarchical description. Analogously, the engineering of non-trivial MASs (multiagent systems) requires principles and mechanisms for a multi-l...
Ambra Molesini, Andrea Omicini, Alessandro Ricci, ...
DATE
2010
IEEE
195views Hardware» more  DATE 2010»
15 years 2 months ago
Cool MPSoC programming
Abstract--This paper summarizes a special session on multicore/multi-processor system-on-chip (MPSoC) programming challenges. Wireless multimedia terminals are among the key driver...
Rainer Leupers, Lothar Thiele, Xiaoning Nie, Bart ...