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FGCS
2002
153views more  FGCS 2002»
15 years 4 months ago
HARNESS fault tolerant MPI design, usage and performance issues
Initial versions of MPI were designed to work efficiently on multi-processors which had very little job control and thus static process models. Subsequently forcing them to suppor...
Graham E. Fagg, Jack Dongarra
CISIS
2009
IEEE
15 years 11 months ago
Designing Regular Network-on-Chip Topologies under Technology, Architecture and Software Constraints
—Regular multi-core processors are appearing in the embedded system market as high performance software programmable solutions. The use of regular interconnect fabrics for them a...
Francisco Gilabert Villamón, Daniele Ludovi...
DATE
2007
IEEE
145views Hardware» more  DATE 2007»
15 years 11 months ago
Using an innovative SoC-level FMEA methodology to design in compliance with IEC61508
This paper proposes an innovative methodology to perform and validate a Failure Mode and Effects Analysis (FMEA) at System-on-Chip (SoC) level. This is done in compliance with the...
Riccardo Mariani, Gabriele Boschi, Federico Colucc...
IEEESCC
2007
IEEE
15 years 11 months ago
Brave New Web: Emerging Design Principles and Technologies as Enablers of a Global SOA
Web Services have experienced great interest during the last years as they were expected to play a key role as enablers of seamless application-to-application integration both wit...
Christoph Schroth, Oliver Christ
ICAD
2004
15 years 6 months ago
A Generic, Semantically-Based Design Approach for Spatial Auditory Computer Displays
This paper describes a design approach for creating generic computer user interfaces with spatial auditory displays. It proposes a structured depiction process from formulating mo...
Christopher Frauenberger, Robert Höldrich, Al...