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ARCS
2009
Springer
15 years 10 months ago
Improving Memory Subsystem Performance Using ViVA: Virtual Vector Architecture
The disparity between microprocessor clock frequencies and memory latency is a primary reason why many demanding applications run well below peak achievable performance. Software c...
Joseph Gebis, Leonid Oliker, John Shalf, Samuel Wi...
ISCA
2007
IEEE
177views Hardware» more  ISCA 2007»
15 years 10 months ago
Adaptive insertion policies for high performance caching
The commonly used LRU replacement policy is susceptible to thrashing for memory-intensive workloads that have a working set greater than the available cache size. For such applica...
Moinuddin K. Qureshi, Aamer Jaleel, Yale N. Patt, ...
LCTRTS
2007
Springer
15 years 10 months ago
External memory page remapping for embedded multimedia systems
As memory speeds and bus capacitances continue to rise, external memory bus power will make up an increasing portion of the total system power budget for system-on-a-chip embedded...
Ke Ning, David R. Kaeli
SENSYS
2006
ACM
15 years 10 months ago
Funneling-MAC: a localized, sink-oriented MAC for boosting fidelity in sensor networks
Sensor networks exhibit a unique funneling effect which is a product of the distinctive many-to-one, hop-by-hop traffic pattern found in sensor networks, and results in a signific...
Gahng-Seop Ahn, Se Gi Hong, Emiliano Miluzzo, Andr...
UIST
2005
ACM
15 years 9 months ago
Automation and customization of rendered web pages
On the desktop, an application can expect to control its user interface down to the last pixel, but on the World Wide Web, a content provider has no control over how the client wi...
Michael Bolin, Matthew Webber, Philip Rha, Tom Wil...