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» Design Patterns for Reconfigurable Computing
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IPPS
2005
IEEE
15 years 6 months ago
Analysis of Hardware Acceleration in Reconfigurable Embedded Systems
Embedded designers now have the capability of offloading software routines into custom applicationspecific hardware blocks. This paper evaluates a domain-specific design system fo...
Matthew Ouellette, Daniel A. Connors
61
Voted
SAC
1999
ACM
15 years 4 months ago
Multithreaded Rendezvous: A Design Pattern for Distributed Rendezvous
Ricardo Jiménez-Peris, Marta Patiño-...
DAC
2008
ACM
16 years 1 months ago
An 8x8 run-time reconfigurable FPGA embedded in a SoC
This paper presents a RTR FPGA embedded in a System on Chip fabricated in 130nm CMOS process. Various aspects of the design flow, from automation to floor-planning are discussed. ...
Sumanta Chaudhuri, Sylvain Guilley, Florent Flamen...
97
Voted
CGI
2004
IEEE
15 years 4 months ago
Computer Aided Design for Origamic Architecture Models with Polygonal Representation
An Origamic Architecture (OA) is a folded sheet of perforated paper from which a three-dimensional structure "pops up" when it is opened. It is similar to a "pop-up...
Jun Mitani, Hiromasa Suzuki
FCCM
2003
IEEE
113views VLSI» more  FCCM 2003»
15 years 5 months ago
Issues and Approaches to Coarse-Grain Reconfigurable Architecture Development
Although domain-specialized FPGAs can offer significant area, speed and power improvements over conventional reconfigurable devices, there are several unique and unexplored design...
Kenneth Eguro, Scott Hauck