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DATE
2006
IEEE
202views Hardware» more  DATE 2006»
15 years 9 months ago
Automatic systemC design configuration for a faster evaluation of different partitioning alternatives
In this paper we present a methodology that is based on SystemC [1] for rapid prototyping to greatly enhance and accelerate the exploration of complex systems to optimize the syst...
Nico Bannow, Karsten Haug, Wolfgang Rosenstiel
AINA
2010
IEEE
15 years 8 months ago
Towards Adaptive Mobile Mashups: Opportunities for Designing Effective Persuasive Technology on the Road
— Today’s vehicles and on-road infrastructures are equipped with a large number of sophisticated sensory devices. These sensory devices are capable of monitoring and providing ...
Flora Dilys Salim
ISVLSI
2002
IEEE
109views VLSI» more  ISVLSI 2002»
15 years 8 months ago
A Network on Chip Architecture and Design Methodology
We propose a packet switched platform for single chip systems which scales well to an arbitrary number of processor like resources. The platform, which we call Network-on-Chip (NO...
Shashi Kumar, Axel Jantsch, Mikael Millberg, Johnn...
HOTI
2008
IEEE
15 years 10 months ago
Design Exploration of Optical Interconnection Networks for Chip Multiprocessors
The Network-on-Chip (NoC) paradigm has emerged as a promising solution for providing connectivity among the increasing number of cores that get integrated into both systems-onchip...
Michele Petracca, Benjamin G. Lee, Keren Bergman, ...
137
Voted
ISPD
2005
ACM
174views Hardware» more  ISPD 2005»
15 years 9 months ago
Fast and accurate rectilinear steiner minimal tree algorithm for VLSI design
In this paper, we present a very fast and accurate rectilinear Steiner minimal tree (RSMT)1 algorithm called FLUTE. The algorithm is an extension of the wirelength estimation appr...
Chris C. N. Chu, Yiu-Chung Wong