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IESS
2009
Springer
182views Hardware» more  IESS 2009»
15 years 1 months ago
Modeling Cache Effects at the Transaction Level
Abstract. Embedded system design complexities are growing exponentially. Demand has increased for modeling techniques that can provide both accurate measurements of delay and fast ...
Ardavan Pedram, David Craven, Andreas Gerstlauer
VLSID
2004
IEEE
128views VLSI» more  VLSID 2004»
16 years 4 months ago
A Compact Low-Power Buffer Amplifier with Dynamic Bias Control Technique
This work presents a novel dynamic bias control technique to verify the circuit performance of the lowpower rail-to-rail input/output buffer amplifier, which can be operating in s...
Chih-Jen Yen, Wen-Yaw Chung, Mely Chen Chi
IEEESCC
2008
IEEE
15 years 10 months ago
An Interdisciplinary Methodology for Building Service-oriented Systems on the Web
Services can be characterized as activities in which providers and customers co-create value. The need for a tight collaboration between providers and customers is thus an importa...
Steffen Lamparter, York Sure
DATE
2007
IEEE
55views Hardware» more  DATE 2007»
15 years 10 months ago
Sensitivity analysis for fault-analysis and tolerance in RF front-end circuitry
RFIC reliability is fast becoming a major bottleneck in the yield and performance of modern IC systems, as process complexity and levels of integration continually increase. Due t...
Tejasvi Das, P. R. Mukund
FDL
2007
IEEE
15 years 10 months ago
Measuring the Quality of a SystemC Testbench by using Code Coverage Techniques
The system description language SystemC enables to quickly create executable specifications at adequate levbstraction for both hardware/software integration and fast design space...
Daniel Große, Hernan Peraza, Wolfgang Klinga...