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» Design Recovery of a Two Level System
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ISLPED
2003
ACM
155views Hardware» more  ISLPED 2003»
15 years 8 months ago
Low-power high-level synthesis for FPGA architectures
This paper addresses two aspects of low-power design for FPGA circuits. First, we present an RT-level power estimator for FPGAs with consideration of wire length. The power estima...
Deming Chen, Jason Cong, Yiping Fan
MOBICOM
2012
ACM
13 years 5 months ago
Faster GPS via the sparse fourier transform
GPS is one of the most widely used wireless systems. A GPS receiver has to lock on the satellite signals to calculate its position. The process of locking on the satellites is qui...
Haitham Hassanieh, Fadel Adib, Dina Katabi, Piotr ...
ICCHP
2010
Springer
15 years 1 months ago
A Model to Develop Videogames for Orientation and Mobility
Abstract. There is a real need to have systems for people with visual disabilities to be able to improve their orientation and mobility skills, and especially for children to be ab...
Jaime Sánchez, Luis Guerrero, Mauricio S&aa...
CODES
2002
IEEE
15 years 8 months ago
Hardware support for real-time embedded multiprocessor system-on-a-chip memory management
The aggressive evolution of the semiconductor industry — smaller process geometries, higher densities, and greater chip complexity — has provided design engineers the means to...
Mohamed Shalan, Vincent John Mooney III
DAGSTUHL
1993
15 years 4 months ago
Supporting continuous media applications in a micro-kernel environment
Currently, popular operating systems are unable to support the end-toend real-time requirements of distributed continuous media. Furthermore, the integration of continuous media c...
Geoff Coulson, Gordon S. Blair, Philippe Robin, Do...