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MICRO
2007
IEEE
115views Hardware» more  MICRO 2007»
15 years 4 months ago
Optimizing NUCA Organizations and Wiring Alternatives for Large Caches with CACTI 6.0
A significant part of future microprocessor real estate will be dedicated to L2 or L3 caches. These on-chip caches will heavily impact processor performance, power dissipation, a...
Naveen Muralimanohar, Rajeev Balasubramonian, Norm...
VLSID
2005
IEEE
102views VLSI» more  VLSID 2005»
15 years 10 months ago
Integrated On-Chip Storage Evaluation in ASIP Synthesis
An Application Specific Instruction Set Processor (ASIP) exploits special characteristics of the given application(s) to meet the desired performance, cost and power requirements....
Manoj Kumar Jain, M. Balakrishnan, Anshul Kumar
AGS
2009
Springer
15 years 4 months ago
Design of a Decision Maker Agent for a Distributed Role Playing Game - Experience of the SimParc Project
This paper addresses an ongoing experience in the design of an artificial agent taking decisions in a role playing game populated by human agents and by artificial agents. At fi...
Jean-Pierre Briot, Alessandro Sordoni, Eurico Vasc...
ISCAS
2007
IEEE
180views Hardware» more  ISCAS 2007»
15 years 4 months ago
Characterization of a Fault-tolerant NoC Router
— With increasing reliability concerns for current and next generation VLSI technologies, fault-tolerance is fast becoming an integral part of system-on-chip (SoC) and multicore ...
Sumit D. Mediratta, Jeffrey T. Draper
CEC
2009
IEEE
15 years 4 months ago
Mobile processes, mobile channels and complex dynamic systems
— This paper explores a process-oriented approach to complex systems design, using massive fine-grained concurrency, mobile channels and mobile processes. The complex systems st...
Eric Bonnici, Peter H. Welch