Sciweavers

796 search results - page 30 / 160
» Design Space Exploration for Dynamically Reconfigurable Arch...
Sort
View
ISVLSI
2006
IEEE
149views VLSI» more  ISVLSI 2006»
15 years 3 months ago
Defect-Aware Design Paradigm for Reconfigurable Architectures
With advances in process technology, the feature sizes are decreasing, which leads to higher defect densities. More sophisticated techniques, at increased costs are required to av...
Rahul Jain, Anindita Mukherjee, Kolin Paul
CODES
2002
IEEE
15 years 2 months ago
Dynamic run-time HW/SW scheduling techniques for reconfigurable architectures
Dynamic run-time scheduling in System-on-Chip platforms has become recently an active area of research because of the performance and power requirements of new applications. Moreo...
Juanjo Noguera, Rosa M. Badia
COMPSAC
2004
IEEE
15 years 1 months ago
Services-Oriented Dynamic Reconfiguration Framework for Dependable Distributed Computing
Web services (WS) received significant attention recently because services can be searched, bound, and executed at runtime over the Internet. This paper proposes a dynamic reconfi...
Wei-Tek Tsai, Weiwei Song, Raymond A. Paul, Zhibin...
ESTIMEDIA
2009
Springer
15 years 4 months ago
System-level MP-SoC design space exploration using tree visualization
— The complexity of today’s embedded systems forces designers to model and simulate systems and their components to explore the wide range of design choices. Such design space ...
Toktam Taghavi, Andy D. Pimentel, Mark Thompson
ISCAS
2005
IEEE
127views Hardware» more  ISCAS 2005»
15 years 3 months ago
Wire-driven microarchitectural design space exploration
— In this paper, we propose an interconnect-driven framework that performs an efficient and effective design space exploration for deep submicron processor architecture design. ...
Mongkol Ekpanyapong, Chinnakrishnan S. Ballapuram,...