Sciweavers

796 search results - page 40 / 160
» Design Space Exploration for Dynamically Reconfigurable Arch...
Sort
View
FPL
2007
Springer
78views Hardware» more  FPL 2007»
15 years 4 months ago
Dynamic Cache Switching in Reconfigurable Embedded Systems
The idea of changing cache attributes to suit an application has been explored for single programs. As the popularity of reconfigurable softcore systems grows and these systems in...
John Shield, Peter Sutton, Philip Machanick
ERSA
2008
130views Hardware» more  ERSA 2008»
14 years 11 months ago
Evaluation of MuCCRA-D: A Dynamically Reconfigurable Processor with Directly Interconnected PEs
Coarse-grained dynamically reconfigurable processor arrays (DRPAs) have been received an attention as a flexible and efficient off-loading engine for various types of System-on-Ch...
Masaru Kato, Yohei Hasegawa, Hideharu Amano
DATE
2008
IEEE
117views Hardware» more  DATE 2008»
15 years 4 months ago
Architecture Exploration of NAND Flash-based Multimedia Card
In this paper, we present an architecture exploration methodology for low-end embedded systems where the reduction of cost is a primary design concern. The architecture exploratio...
Sungchan Kim, Chanik Park, Soonhoi Ha
FPL
2008
Springer
116views Hardware» more  FPL 2008»
14 years 11 months ago
Shared reconfigurable architectures for CMPS
This paper investigates reconfigurable architectures suitable for chip multiprocessors (CMPs). Prior research has established that augmenting a conventional processor with reconfi...
Matthew A. Watkins, Mark J. Cianchetti, David H. A...
FDL
2003
IEEE
15 years 3 months ago
Using Rewriting-Logic Notation for Funcional Verification in Data-Stream Based Reconfigurable Computing
Reconfigurable Systolic Arrays are a generalization of Systolic Arrays where node operations and interconnections can be redefined even at run time. This flexibility increases the...
Mauricio Ayala-Rincón, Ricardo P. Jacobi, C...