796 search results - page 51 / 160 » Design Space Exploration for Dynamically Reconfigurable Arch... |
VLSID
2008
IEEE
15 years 10 months ago
2008
IEEE
Power consumption, physical size, and architecture design of sensor node processors have been the focus of sensor network research in the architecture community. What lies at the ...
ICCAD
2006
IEEE
15 years 6 months ago
2006
IEEE
A dynamically reconfigurable processor (DRP) is designed to achieve high area efficiency by switching reconfigurable data paths dynamically. Our DRP architecture has a stand alone...
101
click to vote
DATE
2004
IEEE
15 years 1 months ago
2004
IEEE
Architecture description languages are widely used to perform architecture exploration for application-driven designs, whereas the RT-level is the commonly accepted level for hard...
PROCEDIA
2010
14 years 4 months ago
2010
Currently several computational problems require high processing power to handle huge amounts of data, although underlying core algorithms appear to be rather simple. Especially i...
109
click to vote
SBACPAD
2003
IEEE
15 years 3 months ago
2003
IEEE
This paper presents the cache configuration exploration of a programmable system, in order to find the best matching between the architecture and a given application. Here, prog...