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» Design Space Issues for Intrinsic Evolvable Hardware
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ASAP
2007
IEEE
175views Hardware» more  ASAP 2007»
14 years 11 months ago
Scalable Multi-FPGA Platform for Networks-On-Chip Emulation
Interconnect validation is an important early step toward global SoC (System-On-Chip) validation. Fast performances evaluation and design space exploration for NoCs (Networks-On-C...
Abdellah-Medjadji Kouadri-Mostefaoui, Benaoumeur S...
CDES
2006
184views Hardware» more  CDES 2006»
14 years 10 months ago
Compilation for Future Nanocomputer Architectures
Compilation has a long history of translating a programmer's human-readable code into machine instructions designed to make good use of a specific target computer. In this pa...
Thomas P. Way
ISPASS
2005
IEEE
15 years 3 months ago
Measuring Program Similarity: Experiments with SPEC CPU Benchmark Suites
Performance evaluation using only a subset of programs from a benchmark suite is commonplace in computer architecture research. This is especially true during early design space e...
Aashish Phansalkar, Ajay Joshi, Lieven Eeckhout, L...
ASPDAC
2004
ACM
83views Hardware» more  ASPDAC 2004»
15 years 2 months ago
A procedure for obtaining a behavioral description for the control logic of a non-linear pipeline
Much attention has been directed to different aspects of the design of pipelines [1,2,3,4]. Design of the control logic of non-linear pipelines has however, been considered as a su...
Hashem Hashemi Najaf-abadi
CHI
2000
ACM
15 years 1 months ago
HandSCAPE: a vectorizing tape measure for on-site measuring applications
We introduce HandSCAPE, an orientation-aware digital tape measure, as an input device for digitizing field measurements, and visualizing the volume of the resulting vectors with c...
Jay Lee, Victor Su, Sandia Ren, Hiroshi Ishii