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VLSID
2003
IEEE
147views VLSI» more  VLSID 2003»
16 years 7 months ago
SoC Synthesis with Automatic Hardware Software Interface Generation
Design of efficient System-on-Chips (SoCs) require thorough application analysis to identify various compute intensive parts. These compute intensive parts can be mapped to hardwa...
Amarjeet Singh 0002, Amit Chhabra, Anup Gangwar, B...
MSWIM
2009
ACM
16 years 1 months ago
A performance evaluation framework for fair solutions in ad hoc networks
Fairness in multihop ad hoc networks has received considerable attention in the literature. Many schemes have been proposed, which attempt to compute the “optimal” bit rates o...
Manos Dramitinos, Rémi Vannier, Isabelle Gu...
FDG
2009
ACM
16 years 1 months ago
Perspectives, frame rates and resolutions: it's all in the game
Hardware and platform limitations restrict the display settings for most computer games, forcing a tradeoff between frame rate and resolution to achieve acceptable performance. Pr...
Mark Claypool, Kajal T. Claypool
CF
2006
ACM
16 years 24 days ago
Dynamic thread assignment on heterogeneous multiprocessor architectures
In a multi-programmed computing environment, threads of execution exhibit different runtime characteristics and hardware resource requirements. Not only do the behaviors of distin...
Michela Becchi, Patrick Crowley
CPHYSICS
2006
85views more  CPHYSICS 2006»
15 years 6 months ago
Simulation of n-qubit quantum systems. II. Separability and entanglement
Studies on the entanglement of n-qubit quantum systems have attracted a lot of interest during recent years. Despite the central role of entanglement in quantum information theory...
T. Radtke, S. Fritzsche
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