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ICCAD
2001
IEEE
201views Hardware» more  ICCAD 2001»
15 years 6 months ago
An Integrated Data Path Optimization for Low Power Based on Network Flow Method
Abstract: We propose an effective algorithm for power optimization in behavioral synthesis. In previous work, it has been shown that several hardware allocation/binding problems fo...
Chun-Gi Lyuh, Taewhan Kim, Chien-Liang Liu
DAC
2009
ACM
15 years 4 months ago
Clock skew optimization via wiresizing for timing sign-off covering all process corners
Manufacturing process variability impacts the performance of synchronous logic circuits by means of its effect on both clock network and functional block delays. Typically, varia...
Sari Onaissi, Khaled R. Heloue, Farid N. Najm
EMSOFT
2007
Springer
15 years 4 months ago
Methods for multi-dimensional robustness optimization in complex embedded systems
Design space exploration of embedded systems typically focuses on classical design goals such as cost, timing, buffer sizes, and power consumption. Robustness criteria, i.e. sensi...
Arne Hamann, Razvan Racu, Rolf Ernst
CODES
2005
IEEE
15 years 3 months ago
System-level design automation tools for digital microfluidic biochips
Biochips based on digital microfluidics offer a powerful platform for massively parallel biochemical analysis such as clinical diagnosis and DNA sequencing. Current full-custom de...
Krishnendu Chakrabarty, Fei Su
SODA
2003
ACM
119views Algorithms» more  SODA 2003»
14 years 11 months ago
Simultaneous optimization for concave costs: single sink aggregation or single source buy-at-bulk
We consider the problem of finding efficient trees to send information from k sources to a single sink in a network where information can be aggregated at intermediate nodes in t...
Ashish Goel, Deborah Estrin