Sciweavers

761 search results - page 29 / 153
» Design and Analysis of a Robust Pipelined Memory System
Sort
View
LCTRTS
2001
Springer
15 years 2 months ago
Power-Aware Design Synthesis Techniques for Distributed Real-Time Systems
This paper presents an end-to-end synthesis technique for lowpower distributed real-time system design. This technique synthesizes supply voltages of resources to optimize system-...
Dong-In Kang, Stephen P. Crago, Jinwoo Suh
JIIS
2007
92views more  JIIS 2007»
14 years 10 months ago
Information ecology: open system environment for data, memories, and knowing
An information ecology provides a conceptual framework to consider data, the creation of knowledge, and the flow of information within a multidimensional context. This paper, repor...
Karen S. Baker, Geoffrey C. Bowker
MICRO
2006
IEEE
114views Hardware» more  MICRO 2006»
15 years 4 months ago
Authentication Control Point and Its Implications For Secure Processor Design
Secure processor architecture enables tamper-proof protection on software that addresses many difficult security problems such as reverse-engineering prevention, trusted computing...
Weidong Shi, Hsien-Hsin S. Lee
VLSID
2007
IEEE
133views VLSI» more  VLSID 2007»
15 years 10 months ago
On the Impact of Address Space Assignment on Performance in Systems-on-Chip
Today, VLSI systems for computationally demanding applications are being built as Systems-on-Chip (SoCs) with a distributed memory sub-system which is shared by a large number of ...
G. Hazari, Madhav P. Desai, H. Kasture
FOSSACS
2008
Springer
14 years 11 months ago
Robust Analysis of Timed Automata via Channel Machines
Whereas formal verification of timed systems has become a very active field of research, the idealised mathematical semantics of timed automata cannot be faithfully implemented. Se...
Patricia Bouyer, Nicolas Markey, Pierre-Alain Reyn...