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» Design and CAD for 3D integrated circuits
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DAC
2009
ACM
15 years 10 months ago
Exploring serial vertical interconnects for 3D ICs
Three-dimensional integrated circuits (3D ICs) offer a promising solution to overcome the on-chip communication bottleneck and improve performance over traditional two-dimensional...
Sudeep Pasricha
DAC
2012
ACM
13 years 6 days ago
Chip/package co-analysis of thermo-mechanical stress and reliability in TSV-based 3D ICs
In this work, we propose a fast and accurate chip/package thermomechanical stress and reliability co-analysis tool for TSV-based 3D ICs. We also present a design optimization meth...
Moongon Jung, David Z. Pan, Sung Kyu Lim
DAC
2011
ACM
13 years 9 months ago
TSV stress-aware full-chip mechanical reliability analysis and optimization for 3D IC
In this work, we propose an efficient and accurate full-chip thermomechanical stress and reliability analysis tool and design optimization methodology to alleviate mechanical rel...
Moongon Jung, Joydeep Mitra, David Z. Pan, Sung Ky...
VW
2000
Springer
215views Virtual Reality» more  VW 2000»
15 years 1 months ago
A 3-D Biomechanical Model of the Salamander
This article describes a 3D biomechanical simulation of a salamander to be used in experiments in computational neuroethology. The physically-based simulation represents the salama...
Auke Jan Ijspeert
ISCAS
2005
IEEE
104views Hardware» more  ISCAS 2005»
15 years 3 months ago
On the three-dimensional channel routing
— The 3-D channel routing is a fundamental problem on the physical design of 3-D integrated circuits. The 3-D channel is a 3-D grid G and the terminals are vertices of G located ...
Satoshi Tayu, Patrik Hurtig, Yoshiyasu Horikawa, S...