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DATE
2004
IEEE
129views Hardware» more  DATE 2004»
15 years 3 months ago
Cost-Performance Trade-Offs in Networks on Chip: A Simulation-Based Approach
A challenge facing designers of systems on chip (SoC) containing networks on chip (NoC) is to find NoC instances that balance the cost (e.g. area) and performance (e.g. latency an...
Santiago González Pestana, Edwin Rijpkema, ...
AVI
2008
15 years 2 months ago
Exploring blog archives with interactive visualization
Browsing a blog archive is currently not well supported. Users cannot gain an overview of a blog easily, nor do they receive adequate support for finding potentially interesting e...
Indratmo, Julita Vassileva, Carl Gutwin
189
Voted
ASPLOS
2009
ACM
16 years 12 days ago
Dynamic prediction of collection yield for managed runtimes
The growth in complexity of modern systems makes it increasingly difficult to extract high-performance. The software stacks for such systems typically consist of multiple layers a...
Michal Wegiel, Chandra Krintz
JCDL
2009
ACM
133views Education» more  JCDL 2009»
15 years 6 months ago
Cost and benefit analysis of mediated enterprise search
The utility of an enterprise search system is determined by three key players: the information retrieval (IR) system (the search engine), the enterprise users, and the service pro...
Mingfang Wu, James A. Thom, Andrew Turpin, Ross Wi...
CODES
2007
IEEE
15 years 6 months ago
A code-generator generator for multi-output instructions
We address the problem of instruction selection for Multi-Output Instructions (MOIs), producing more than one result. Such inherently parallel hardware instructions are very commo...
Hanno Scharwächter, Jonghee M. Youn, Rainer L...