Sciweavers

1084 search results - page 184 / 217
» Design and Evaluation of a Selective Compressed Memory Syste...
Sort
View
ISPASS
2010
IEEE
15 years 6 months ago
Runahead execution vs. conventional data prefetching in the IBM POWER6 microprocessor
After many years of prefetching research, most commercially available systems support only two types of prefetching: software-directed prefetching and hardware-based prefetchers u...
Harold W. Cain, Priya Nagpurkar
ICDE
2010
IEEE
180views Database» more  ICDE 2010»
14 years 12 months ago
Adaptive indexing for relational keys
: © Adaptive indexing for relational keys Goetz Graefe, Harumi Kuno HP Laboratories HPL-2010-23 databases, indexes, storage systems, B-trees, adaptive merging, database cracking A...
Goetz Graefe, Harumi A. Kuno
MICRO
2006
IEEE
88views Hardware» more  MICRO 2006»
14 years 11 months ago
SWICH: A Prototype for Efficient Cache-Level Checkpointing and Rollback
Low-overhead checkpointing and rollback is a popular technique for fault recovery. While different approaches are possible, hardware-supported checkpointing and rollback at the ca...
Radu Teodorescu, Jun Nakano, Josep Torrellas
MICRO
2008
IEEE
114views Hardware» more  MICRO 2008»
15 years 6 months ago
Toward a multicore architecture for real-time ray-tracing
Significant improvement to visual quality for real-time 3D graphics requires modeling of complex illumination effects like soft-shadows, reflections, and diffuse lighting intera...
Venkatraman Govindaraju, Peter Djeu, Karthikeyan S...
95
Voted
SASP
2008
IEEE
162views Hardware» more  SASP 2008»
15 years 6 months ago
Accelerating Compute-Intensive Applications with GPUs and FPGAs
—Accelerators are special purpose processors designed to speed up compute-intensive sections of applications. Two extreme endpoints in the spectrum of possible accelerators are F...
Shuai Che, Jie Li, Jeremy W. Sheaffer, Kevin Skadr...