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FPGA
2006
ACM
129views FPGA» more  FPGA 2006»
15 years 5 months ago
Power-aware RAM mapping for FPGA embedded memory blocks
Embedded memory blocks are important resources in contemporary FPGA devices. When targeting FPGAs, application designers often specify high-level memory functions which exhibit a ...
Russell Tessier, Vaughn Betz, David Neto, Thiagara...
PUC
2008
113views more  PUC 2008»
15 years 1 months ago
Design and evaluation of systems to support interaction capture and retrieval
Although many recent systems have been built to support Information Capture and Retrieval (ICR), these have not generally been successful. This paper presents studies that evaluate...
Steve Whittaker, Simon Tucker, Kumutha Swampillai,...
HPCA
2001
IEEE
16 years 2 months ago
A New Scalable Directory Architecture for Large-Scale Multiprocessors
The memory overhead introduced by directories constitutes a major hurdle in the scalability of cc-NUMA architectures, which makes the shared-memory paradigm unfeasible for very la...
Manuel E. Acacio, José González, Jos...
LCTRTS
2007
Springer
15 years 8 months ago
External memory page remapping for embedded multimedia systems
As memory speeds and bus capacitances continue to rise, external memory bus power will make up an increasing portion of the total system power budget for system-on-a-chip embedded...
Ke Ning, David R. Kaeli
SPAA
2010
ACM
15 years 6 months ago
Implementing and evaluating nested parallel transactions in software transactional memory
Transactional Memory (TM) is a promising technique that simplifies parallel programming for shared-memory applications. To date, most TM systems have been designed to efficientl...
Woongki Baek, Nathan Grasso Bronson, Christos Kozy...