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» Design and Implementation of Real-Time Transactional Memory
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ICFP
2008
ACM
15 years 9 months ago
Transactional events for ML
Transactional events (TE) are an approach to concurrent programming that enriches the first-class synchronous message-passing of Concurrent ML (CML) with a combinator that allows ...
Laura Effinger-Dean, Matthew Kehrt, Dan Grossman
CASES
2007
ACM
15 years 1 months ago
A self-maintained memory module supporting DMM
The memory intensive nature of object-oriented languages such as C++ and Java has created the need of a high-performance dynamic memory management (DMM); however, it is a challeng...
Weixing Ji, Feng Shi, Baojun Qiao
ISLPED
2003
ACM
111views Hardware» more  ISLPED 2003»
15 years 2 months ago
Energy-aware memory allocation in heterogeneous non-volatile memory systems
Memory systems consume a significant portion of power in handheld embedded systems. So far, low-power memory techniques have addressed the power consumption when the system is tu...
Hyung Gyu Lee, Naehyuck Chang
ASPLOS
2000
ACM
15 years 2 months ago
Architecture and design of AlphaServer GS320
This paper describes the architecture and implementation of the AlphaServer GS320, a cache-coherent non-uniform memory access multiprocessor developed at Compaq. The AlphaServer G...
Kourosh Gharachorloo, Madhu Sharma, Simon Steely, ...
HPCA
2006
IEEE
15 years 10 months ago
The common case transactional behavior of multithreaded programs
Transactional memory (TM) provides an easy-to-use and high-performance parallel programming model for the upcoming chip-multiprocessor systems. Several researchers have proposed a...
JaeWoong Chung, Hassan Chafi, Chi Cao Minh, Austen...