Sciweavers

559 search results - page 111 / 112
» Design and Implementation of a Dynamic-Reconfigurable Archit...
Sort
View
MICRO
2009
IEEE
168views Hardware» more  MICRO 2009»
14 years 27 days ago
Ordering decoupled metadata accesses in multiprocessors
Hardware support for dynamic analysis can minimize the performance overhead of useful applications such as security checks, debugging, and profiling. To eliminate implementation ...
Hari Kannan
MICRO
2006
IEEE
84views Hardware» more  MICRO 2006»
14 years 8 days ago
Reunion: Complexity-Effective Multicore Redundancy
To protect processor logic from soft errors, multicore redundant architectures execute two copies of a program on separate cores of a chip multiprocessor (CMP). Maintaining identi...
Jared C. Smolens, Brian T. Gold, Babak Falsafi, Ja...
MOBICOM
2006
ACM
14 years 7 days ago
Boundary recognition in sensor networks by topological methods
Wireless sensor networks are tightly associated with the underlying environment in which the sensors are deployed. The global topology of the network is of great importance to bot...
Yue Wang, Jie Gao, Joseph S. B. Mitchell
FPL
2005
Springer
122views Hardware» more  FPL 2005»
13 years 11 months ago
FPGA-Aware Garbage Collection in Java
— During codesign of a system, one still runs into the impedance mismatch between the software and hardware worlds. er identifies the different levels of abstraction of hardware...
Philippe Faes, Mark Christiaens, Dries Buytaert, D...
GI
2004
Springer
13 years 11 months ago
A Low-Cost Solution for Frequent Symmetric Key Exchange in Ad-hoc Networks
: Next to authentication, secure key exchange is considered the most critical and complex issue regarding ad-hoc network security. We present a low-cost, (i.e. low hardware-complex...
Markus Volkmer, Sebastian Wallner