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HOTI
2005
IEEE
15 years 7 months ago
Control Path Implementation for a Low-Latency Optical HPC Switch
— A crucial part of any high-performance computing system is its interconnection network. In the OSMOSIS project, Corning and IBM are jointly developing a demonstrator interconne...
Cyriel Minkenberg, François Abel, Peter M&u...
136
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HIPC
2005
Springer
15 years 7 months ago
Design and Implementation of the HPCS Graph Analysis Benchmark on Symmetric Multiprocessors
Graph theoretic problems are representative of fundamental computations in traditional and emerging scientific disciplines like scientific computing, computational biology and b...
David A. Bader, Kamesh Madduri
ICCS
2003
Springer
15 years 7 months ago
A Parallel Virtual Machine for Bulk Synchronous Parallel ML
We have designed a functional data-parallel language called BSML for programming bulk-synchronous parallel (BSP) algorithms. The execution time can be estimated and dead-locks and ...
Frédéric Gava, Frédéri...
IPPS
2006
IEEE
15 years 8 months ago
Implementation of a programmable array processor architecture for approximate string matching algorithms on FPGAs
Approximate string matching problem is a common and often repeated task in information retrieval and bioinformatics. This paper proposes a generic design of a programmable array p...
Panagiotis D. Michailidis, Konstantinos G. Margari...
121
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BMCBI
2007
139views more  BMCBI 2007»
15 years 2 months ago
XSTREAM: A practical algorithm for identification and architecture modeling of tandem repeats in protein sequences
Background: Biological sequence repeats arranged in tandem patterns are widespread in DNA and proteins. While many software tools have been designed to detect DNA tandem repeats (...
Aaron M. Newman, James B. Cooper