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VIS
2007
IEEE
149views Visualization» more  VIS 2007»
16 years 3 months ago
Time Dependent Processing in a Parallel Pipeline Architecture
Pipeline architectures provide a versatile and efficient mechanism for constructing visualizations, and they have been implemented in numerous libraries and applications over the p...
John Biddiscombe, Berk Geveci, Ken Martin, Kenn...
122
Voted
IPPS
2006
IEEE
15 years 8 months ago
Placement and routing of Boolean functions in constrained FPGAs using a distributed genetic algorithm and local search
In this work we present a system for implementing the placement and routing stages in the FPGA cycle of design, into the physical design stage. We start with the ISCAS benchmarks,...
Manuel Rubio del Solar, Juan Manuel Sánchez...
134
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AIEDAM
2000
80views more  AIEDAM 2000»
15 years 2 months ago
Conceptual design and analysis by sketching
The ability of a CAD system to perceive a three-dimensional model depicted in a single freehand sketch presents the practical possibility of bringing numerous established analysis...
Hod Lipson, Moshe Shpitalni
PADS
1998
ACM
15 years 6 months ago
GloMoSim: A Library for Parallel Simulation of Large-Scale Wireless Networks
A number of library-based parallel and sequential network simulators have been designed. This paper describes a library, called GloMoSim (for Global Mobile system Simulator), for ...
Xiang Zeng, Rajive Bagrodia, Mario Gerla
107
Voted
IPPS
1999
IEEE
15 years 7 months ago
Scalable Hardware-Algorithms for Binary Prefix Sums
Abstract. Themain contributionof thiswork isto propose a numberof broadcastefficient VLSI architectures for computing the sum and the prefix sums of a w k-bit, k 2, binary sequenc...
Rong Lin, Koji Nakano, Stephan Olariu, Maria Crist...