Sciweavers

862 search results - page 54 / 173
» Design and Implementation of the TRIPS Primary Memory System
Sort
View
CHI
2011
ACM
14 years 3 months ago
Move-it: interactive sticky notes actuated by shape memory alloys
A lot of people still rely on pen and paper for taking short notes. Post-Its® are still the most popular paper media for informal note taking. In this paper, we present the desig...
Kathrin Probst, Thomas Seifried, Michael Haller, K...
RTAS
2010
IEEE
14 years 10 months ago
DARTS: Techniques and Tools for Predictably Fast Memory Using Integrated Data Allocation and Real-Time Task Scheduling
—Hardware-managed caches introduce large amounts of timing variability, complicating real-time system design. One alternative is a memory system with scratchpad memories which im...
Sangyeol Kang, Alexander G. Dean
ICS
2009
Tsinghua U.
15 years 4 months ago
Dynamic task set partitioning based on balancing memory requirements to reduce power consumption
ABSTRACT Because of technology advances power consumption has emerged up as an important design issue in modern high-performance microprocessors. As a consequence, research on redu...
Diana Bautista, Julio Sahuquillo, Houcine Hassan, ...
DAC
2004
ACM
16 years 23 days ago
Virtual memory window for application-specific reconfigurable coprocessors
Reconfigurable Systems-on-Chip (SoCs) on the market consist of full-fledged processors and large Field-Programmable Gate-Arrays (FPGAs). The latter can be used to implement the sy...
Miljan Vuletic, Laura Pozzi, Paolo Ienne
MICRO
2006
IEEE
145views Hardware» more  MICRO 2006»
15 years 5 months ago
Virtually Pipelined Network Memory
We introduce virtually-pipelined memory, an architectural technique that efficiently supports high-bandwidth, uniform latency memory accesses, and high-confidence throughput eve...
Banit Agrawal, Timothy Sherwood