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» Design and Implementation of the TRIPS Primary Memory System
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DAC
1997
ACM
15 years 4 months ago
Data Memory Minimisation for Synchronous Data Flow Graphs Emulated on DSP-FPGA Targets
The paper presents an algorithm to determine the close-tosmallest possible data buffer sizes for arbitrary synchronous data flow (SDF) applications, such that we can guarantee the...
Marleen Adé, Rudy Lauwereins, J. A. Peperst...
DAC
2004
ACM
16 years 23 days ago
An integrated hardware/software approach for run-time scratchpad management
An ever increasing number of dynamic interactive applications are implemented on portable consumer electronics. Designers depend largely on operating systems to map these applicat...
Francesco Poletti, Paul Marchal, David Atienza, Lu...
CIDR
2011
223views Algorithms» more  CIDR 2011»
14 years 3 months ago
No bits left behind
One of the key tenets of database system design is making efficient use of storage and memory resources. However, existing database system implementations are actually extremely ...
Eugene Wu 0002, Carlo Curino, Samuel Madden
TVLSI
2010
14 years 6 months ago
Improving Multi-Level NAND Flash Memory Storage Reliability Using Concatenated BCH-TCM Coding
By storing more than one bit in each memory cell, multi-level per cell (MLC) NAND flash memories are dominating global flash memory market due to their appealing storage density ad...
Shu Li, Tong Zhang
FCCM
2004
IEEE
118views VLSI» more  FCCM 2004»
15 years 3 months ago
Virtual Memory Window for a Portable Reconfigurable Cryptography Coprocessor
Reconfigurable System-on-Chip (SoC) platforms that incorporate hard-core processors surrounded by large amounts of FPGA are today commodities: the reconfigurable logic is often us...
Miljan Vuletic, Laura Pozzi, Paolo Ienne