862 search results - page 84 / 173 » Design and Implementation of the TRIPS Primary Memory System |
129
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AAAIDEA
2005
IEEE
15 years 5 months ago
2005
IEEE
—Differentiated Service (DiffServ) in combination with Multi-Protocol Label Switching (MPLS) is a promising technology in converting the best-effort Internet into a QoS-capable n...
SC
2009
ACM
15 years 6 months ago
2009
ACM
The management of shared caches in multicore processors is a critical and challenging task. Many hardware and OS-based methods have been proposed. However, they may be hardly adop...
FBIT
2007
IEEE
15 years 6 months ago
2007
IEEE
This article reports on a neural prosthesis stimulation system for long-term use in animal electrical stimulation experiments. The presented system consists of an implantable stim...
130
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HPCA
1996
IEEE
15 years 4 months ago
1996
IEEE
We have investigated the register file requirements of dynamically scheduled processors using register renaming and dispatch queues running the SPEC92 benchmarks. We looked at pro...
PADS
1996
ACM
15 years 4 months ago
1996
ACM
Advances in massively parallel platforms are increasing the prospects for high performance discrete event simulation. Still the di culty in parallel programming persists and there...