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» Design and Performance of Multipath MIN Architectures
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IPPS
1998
IEEE
15 years 1 months ago
Impact of Switch Design on the Application Performance of Cache-Coherent Multiprocessors
In this paper, the effect of switch design on the application performance of cache-coherent non-uniform memory access (CC-NUMA) multiprocessors is studied in detail. Wormhole rout...
Laxmi N. Bhuyan, Hu-Jun Wang, Ravi R. Iyer, Akhile...
MOBICOM
2004
ACM
15 years 3 months ago
Performance evaluation of safety applications over DSRC vehicular ad hoc networks
In this paper we conduct a feasibility study of delay-critical safety applications over vehicular ad hoc networks based on the emerging dedicated short range communications (DSRC)...
Jijun Yin, Tamer A. ElBatt, Gavin Yeung, Bo Ryu, S...
VLSI
2007
Springer
15 years 3 months ago
A low-power deblocking filter architecture for H.264 advanced video coding
Abstract— In this paper, a low-power deblocking filter architecture for H.264/AVC is proposed. A hybrid filtering order has been adopted to boost the speed of the deblocking ...
Jaemoon Kim, Sangkwon Na, Chong-Min Kyung
ICC
2007
IEEE
143views Communications» more  ICC 2007»
15 years 3 months ago
Impact of Sampling Jitter on Mostly-Digital Architectures for UWB Bio-Medical Applications
Abstract— Ultra-wideband (UWB) impulse radio is a promising technique for low-power bio-medical communication systems. While a range of analog and digital UWB architectures exist...
Andrew Fort, Mike Chen, Robert W. Brodersen, Claud...
DAC
1999
ACM
15 years 1 months ago
Reducing Cross-Coupling Among Interconnect Wires in Deep-Submicron Datapath Design
As the CMOS technology enters the deep submicron design era, the lateral inter-wire coupling capacitance becomes the dominant part of load capacitance and makes RC delay on the bu...
Joon-Seo Yim, Chong-Min Kyung