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» Design and Performance of Multipath MIN Architectures
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DAC
2001
ACM
15 years 10 months ago
Power-Aware Scheduling under Timing Constraints for Mission-Critical Embedded Systems
Power-aware systems are those that must make the best use of available power. They subsume traditional low-power systems in that they must not only minimize power when the budget ...
Jinfeng Liu, Pai H. Chou, Nader Bagherzadeh, Fadi ...
SIGCSE
2002
ACM
126views Education» more  SIGCSE 2002»
14 years 9 months ago
Design patterns for games
Designing a two-person game involves identifying the game model to compute the best moves, the user interface (the "view") to play the game, and the controller to coordi...
Dung Zung Nguyen, Stephen B. Wong
ASPDAC
2000
ACM
104views Hardware» more  ASPDAC 2000»
15 years 2 months ago
Design of digital neural cell scheduler for intelligent IB-ATM switch
— We present the architecture of the ATM banyan switch composed of pattern process and high-speed digital neural cell scheduler. An input buffer type ATM switch with a window-bas...
J.-K. Lee, Seung-Min Lee, Mike Myung-Ok Lee, D.-W....
WISEC
2009
ACM
15 years 4 months ago
Jamming for good: a fresh approach to authentic communication in WSNs
While properties of wireless communications are often considered as a disadvantage from a security perspective, this work demonstrates how multipath propagation, a broadcast mediu...
Ivan Martinovic, Paul Pichota, Jens B. Schmitt
SIGCOMM
2004
ACM
15 years 3 months ago
Link-level measurements from an 802.11b mesh network
This paper analyzes the causes of packet loss in a 38-node urban multi-hop 802.11b network. The patterns and causes of loss are important in the design of routing and errorcorrect...
Daniel Aguayo, John C. Bicket, Sanjit Biswas, Glen...