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» Design and Performance of Optimized Relay Mappings
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FPGA
2008
ACM
184views FPGA» more  FPGA 2008»
14 years 11 months ago
Mapping for better than worst-case delays in LUT-based FPGA designs
Current advances in chip design and manufacturing have allowed IC manufacturing to approach the nanometer range. As the feature size scales down, greater variability is experience...
Kirill Minkovich, Jason Cong
85
Voted
JSAC
2007
132views more  JSAC 2007»
14 years 9 months ago
Lifetime maximization via cooperative nodes and relay deployment in wireless networks
— Extending lifetime of battery-operated devices is a key design issue that allows uninterrupted information exchange among distributed nodes in wireless networks. Cooperative co...
Thanongsak Himsoon, W. Pam Siriwongpairat, Zhu Han...
NPC
2007
Springer
15 years 3 months ago
Performance Prediction for Mappings of Distributed Applications on PC Clusters
Abstract. Distributed applications running on clusters may be composed of several components with very different performance requirements. The FlowVR middleware allows the develop...
Sylvain Jubertie, Emmanuel Melin
CODES
2007
IEEE
15 years 4 months ago
Performance and resource optimization of NoC router architecture for master and slave IP cores
System-on-Chip architectures incorporate several IP cores with well defined master and slave characteristics in terms of on-chip communication. The paper presents a parameterized ...
Glenn Leary, Krishna Mehta, Karam S. Chatha
ICC
2007
IEEE
15 years 4 months ago
Optimal Constellation for General Rectangular PAM/QAM with Arbitrary Code Mapping
Abstract— Recently the exact expression for the BER of rectangular QAM with arbitrary code mapping was obtained [1]. It is then natural to ask for the optimal constellation desig...
Ning Wei, Yi Wan