330 search results - page 21 / 66 » Design and Performance of Optimized Relay Mappings |
ISCA
2000
IEEE
15 years 2 months ago
2000
IEEE
As microprocessors continue to evolve, many optimizations reach a point of diminishing returns. We introduce HLS, a hybrid processor simulator which uses statistical models and sy...
ICAC
2009
IEEE
15 years 4 months ago
2009
IEEE
We apply the concept of “games with a purpose” to NPcomplete mapping and scheduling problems in distributed systems and report our experiences. The particular context is a sch...
GLVLSI
2007
IEEE
15 years 4 months ago
2007
IEEE
This paper proposes a library-free technology mapping algorithm to reduce delay in combinational circuits. The algorithm reduces the overall number of series transistors through t...
VLDB
1997
ACM
15 years 1 months ago
1997
ACM
Selecting views to materialize is one of the most important decisions in designing a data warehouse. In this paper, we present a framework for analyzing the issues in selecting vi...
ISSS
2002
IEEE
15 years 2 months ago
2002
IEEE
We present a system-level design and programming method for embedded multiprocessor systems. The aim of the method is to improve the design time and design quality by providing a ...