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» Design and Performance of Optimized Relay Mappings
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ICVS
2001
Springer
15 years 2 months ago
Compiling SA-C Programs to FPGAs: Performance Results
Abstract. At the first ICVS, we presented SA-C (“sassy”), a singleassignment variant of the C programming language designed to exploit both coarse-grain and fine-grain parallel...
Bruce A. Draper, A. P. Wim Böhm, Jeffrey Hamm...
ICMCS
2007
IEEE
158views Multimedia» more  ICMCS 2007»
15 years 4 months ago
Content-Aware P2P Video Streaming with Low Latency
This paper describes the Stanford P2P Multicast (SPPM) streaming system that employs an overlay architecture specifically designed for low delay video applications. In order to p...
Pierpaolo Baccichet, Jeonghun Noh, Eric Setton, Be...
ARC
2007
Springer
169views Hardware» more  ARC 2007»
15 years 3 months ago
Designing Heterogeneous FPGAs with Multiple SBs
Abstract. The novel design of high-speed and low-energy FPGA routing architecture consisting of appropriate wire segments and multiple Switch Boxes is introduced. For that purpose,...
Kostas Siozios, Stelios Mamagkakis, Dimitrios Soud...
ASPDAC
2006
ACM
158views Hardware» more  ASPDAC 2006»
15 years 3 months ago
Analysis of scratch-pad and data-cache performance using statistical methods
— An effectively designed and efficiently used memory hierarchy, composed of scratch-pads or cache, is seen today as the key to obtaining energy and performance gains in data-do...
Javed Absar, Francky Catthoor
DASFAA
2006
IEEE
111views Database» more  DASFAA 2006»
15 years 3 months ago
Holistic Schema Mappings for XML-on-RDBMS
When hosting XML information on relational backends, a mapping has to be established between the schemas of the information source and the target storage repositories. A rich body ...
Priti Patil, Jayant R. Haritsa