330 search results - page 39 / 66 » Design and Performance of Optimized Relay Mappings |
SECON
2007
IEEE
15 years 4 months ago
2007
IEEE
—In this paper, we develop a joint Network Coding (NC)-channel coding error-resilient sensor-network approach that performs In-Network Processing based on channel code Design (IN...
ICCAD
1997
IEEE
15 years 2 months ago
1997
IEEE
Traditional synthesis techniques optimize CMOS circuits in two phases i) logic minimization and ii) library mapping phase. Typically, the structures and the sizes of the gates in ...
CODES
2008
IEEE
14 years 10 months ago
2008
IEEE
With power becoming a major constraint for multi-processor embedded systems, it is becoming important for designers to characterize and model processor power dissipation. It is cr...
DSD
2010
IEEE
14 years 10 months ago
2010
IEEE
—Since many embedded systems execute a predefined set of programs, tuning system components to application programs and data is the approach chosen by many design techniques to o...
CODES
2005
IEEE
15 years 3 months ago
2005
IEEE
Networks-on-Chip (NoCs) have been recently proposed as a promising solution to complex on-chip communication problems. The lack of an unified representation of applications and ar...