A design flow for processor platforms with on-chip coarse-grain reconfigurable logic is presented. The reconfigurable logic is realized by a 2-Dimensional Array of Processing Elem...
Michalis D. Galanis, Grigoris Dimitroulakos, Const...
—To satisfy the stringent requirement of capacity enhancement in wireless networks, cooperative relaying is envisioned as one of the most effective solutions. In this paper, we s...
Bin Lin, Pin-Han Ho, Liang-Liang Xie, Xuemin (Sher...
The cooperative automatic repeat request (C-ARQ) is a link layer relaying protocol which exploits the spatial diversity and allows the relay node to retransmit the source data pac...
Morteza Mardani, Jalil S. Harsini, Farshad Lahouti
Abstract—In this paper, we consider a robust design of MIMOrelay precoder and receive filter for the destination nodes in a non-regenerative multiple-input multiple-output (MIMO...
Both technology mapping and circuit clustering have a large impact on FPGA designs in terms of circuit performance, area, and power dissipation. Existing FPGA design flows carry o...