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VLSID
2004
IEEE
112views VLSI» more  VLSID 2004»
15 years 10 months ago
Designing Leakage Aware Multipliers
Power consumption has become a major design limiter. With the continued reduction of threshold voltages, optimizing leakage energy consumption is becoming increasingly important. ...
M. DeRenzo, Mary Jane Irwin, Narayanan Vijaykrishn...
FCCM
2007
IEEE
168views VLSI» more  FCCM 2007»
14 years 10 months ago
Discrete-Time Cellular Neural Networks in FPGA
This paper describes a novel architecture for the hardware implementation of non-linear multi-layer cellular neural networks. This makes it feasible to design CNNs with millions o...
J. Javier Martínez-Álvarez, F. Javie...
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ATAL
2004
Springer
15 years 3 months ago
Naming Services in Multi-Agent Systems: A Design for Agent-Based White Pages
Distributed multi-agent systems require naming services to locate and communicate with remote agents. In this paper we focus on the design and implementation of the “White Pages...
Todd Wright
RECONFIG
2008
IEEE
268views VLSI» more  RECONFIG 2008»
15 years 4 months ago
Parametric, Secure and Compact Implementation of RSA on FPGA
1 We present a fast, efficient, and parameterized modular multiplier and a secure exponentiation circuit especially intended for FPGAs on the low end of the price range. The desig...
Ersin Oksuzoglu, Erkay Savas
ISCAS
2003
IEEE
114views Hardware» more  ISCAS 2003»
15 years 3 months ago
On the hardware implementations of the SHA-2 (256, 384, 512) hash functions
Couple to the communications wired and unwired networks growth, is the increasing demand for strong secure data transmission. New cryptographic standards are developed, and new en...
Nicolas Sklavos, Odysseas G. Koufopavlou