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VLSID
2006
IEEE
145views VLSI» more  VLSID 2006»
15 years 3 months ago
Novel BCD Adders and Their Reversible Logic Implementation for IEEE 754r Format
IEEE 754r is the ongoing revision to the IEEE 754 floating point standard and a major enhancement to the standard is the addition of decimal format. This paper proposes two novel ...
Himanshu Thapliyal, Saurabh Kotiyal, M. B. Sriniva...
ARVLSI
1995
IEEE
146views VLSI» more  ARVLSI 1995»
15 years 1 months ago
Array-of-arrays architecture for parallel floating point multiplication
This paper presents a new architecture style for the design of a parallel floating point multiplier. The proposed architecture is a synergy of trees and arrays. Architectural mod...
H. Dhanesha, K. Falakshahi, Mark Horowitz
MOBISYS
2004
ACM
15 years 9 months ago
Implementing Software on Resource-Constrained Mobile Sensors: Experiences with Impala and ZebraNet
ZebraNet is a mobile, wireless sensor network in which nodes move throughout an environment working to gather and process information about their surroundings [10]. As in many sen...
Ting Liu, Christopher M. Sadler, Pei Zhang, Margar...
VLSID
2004
IEEE
119views VLSI» more  VLSID 2004»
15 years 10 months ago
Rapid Prototyping for Configurable System-on-a-Chip Platforms: A Simulation Based Approach
The design of any application on a configurable System-on-a-Chip (SoC) like Atmel's FPSLIC is subject to a lot of constraints stemming from requirements of the application an...
Jens Bieger, Sorin A. Huss, Michael Jung, Stephan ...
TCSV
2002
69views more  TCSV 2002»
14 years 9 months ago
Optimizing channel allocation in a unified video-on-demand system
Unified video-on-demand (UVoD) is a recently proposed architecture that integrates multicast transmission with unicast transmission to improve system efficiency. Streaming channels...
Jack Y. B. Lee